报告题目：Strain Influence on Analog Performance of FinFET SOI nMOSFETs at room and at low temperatures

报 告 人：Prof. Dr. Joao Antonio Martino （University of Sao Paulo

Department of Electronics Engineering）

地    点：天游ty8线路1线路2线路3微电子楼三楼多媒体教室

时    间：  2008 年10月24日（周五）下午1：30

Abstract: The aim of this presentation is to offer a comprehensive image of the state-of-the-art and future trends of Strain and Multiple Gate Devices. After that we will focus the presentation on analog performance of uniaxial and biaxial strained single-gate fully depleted SOI nMOSFETs and standard and strained Si (sSOI) n-type triple-gate FinFETs with high-k dielectrics and TiN gate material. The analysis is performed focusing on some important analog figures of merit such as transconductance, Early voltage, output conductance and intrinsic voltage gain. The behavior of the FinFET at low temperature will be also presented.

Joao Antonio Martino was born in Sao Paulo, Brazil. He has two nationalities: Brazilian and Italian. He received the Electrical Engineering degree from Faculdade de Engenharia Industrial (FEI) in 1981. He received the M.Sc (NMOS Technology) and the Ph.D (CMOS Technology) degrees in 1984 and 1988 respectively in Electrical Engineering (Microelectronics) from University of Sao Paulo (USP), Brazil. Presently he is a full Professor at Electrical Engineering Department of University of Sao Paulo, Brazil. He has been working together with the Interuniversity Microelectronic Center (IMEC) at Catholic University of Leuven (KUL), Leuven, Belgium since 1989 in SOI Technology. He is author and co-author of more than 220 technical journal papers and conference presentation and author/editor of 4 books. His expertise is in the area of the electrical characterization and modeling of SOI devices. He is also interested in SOI-CMOS fabrication process and Multiple Gate devices. He is Senior Member of IEEE, Member of Electrochemical Society and the Chapter Chair of South Brazil Session of IEEE � Electron Device Society.

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