Topic：Scalable Analysis and Design of IC Power Delivery

Time：2015年4月7日（周二）上午10:00-11:30

Venue：玉泉校区行政楼108

Speaker：曾志宇 博士

Abstract

Due to recent aggressive process scaling, power delivery network design faces many challenges such as large sheer network complexity and the employment of various cutting-edge low-power techniques. In this presentation, a novel parallel partitioning-based approach for static analysis is proposed  which provides a flexible network partitioning scheme and a block-based iterative error-reduction flow. In addition, a fast CPU-GPU combined analysis engine is developed for power delivery networks with active voltage regulators/converters and sophisticated off-chip models. Then, a systematic design analysis is conducted on power delivery networks that incorporate buck converters and low-dropout voltage regulators. The electrical interactions between active regulators/converters and passive networks, as well as their influences on key system design specifications are analyzed comprehensively. With the derived design insights, the system-level co-design of a complete power delivery network is facilitated by an automatic optimization flow. The tradeoffs between different design specifications are summarized. In the end, several practical power delivery network design/analysis problems are presented.

Biography

Zhiyu Zeng received the B.S. degree from the Department of Information Science & Electronic Engineering at Zhejiang University in 2006, and the Ph.D. degree from the Department of Electrical and Computer Engineering at Texas A&M University in 2011. In 2012, he joined Cadence Digital and Signoff Group as a principle software engineer for developing Voltus IC Power Integrity Solution which was the newest generation of power signoff tool released by Cadence in late 2013. He was one of the main developers for the massively parallel software architecture and core engine in Voltus which achieved radical 10X performance boost and better design capacity. He was the recipient of  the 3^rd Prize in TAU Power Grid Simulation Contest in 2011 and Cadence Enterprise Innovation Award in 2013. He has several publications on EDA (Electronic Design Automation) premier journals and conferences such as TCAD, TVLSI, TODAES, DAC, ICCAD and ISQED.